Field-effect transistor and fabrication method

Details Field-effect transistor and fabrication method Field-effect transistor and fabrication method

1996-06-26

1997-12-02

Meier, Stephen

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

257192, 257180, H01L 310328, H01L 310336, H01L 31072, H01L 31109

Patent

active

056939647

ABSTRACT:
A channel layer of n-type GaAs doped with Si as an impurity is formed on a GaAs semiinsulating substrate. A gate electrode of, for example, aluminum is formed on the channel layer. The gate electrode is in Schottky-contact with channel layer. Formed on opposite sides of the gate electrode on the channel layer are drain- and source side electric field relaxation layers of n-type In.sub.x G.sub.1-x As doped with impurities. Each electric field relaxation layer substantially produces a potential difference at its lateral edge portion by an electric current flowing across the lateral edge portion. A WSi drain electrode is formed on the drain-side electric field relaxation layer. A WSi source electrode is formed on the source-side electric field relaxation layer.

REFERENCES:
patent: 5508530 (1996-04-01), Nakajima
patent: 5521403 (1996-05-01), Usui et al.

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