Field effect transistor

Details Field effect transistor Field effect transistor

2008-01-22

2008-01-22

Wilczewski, Mary (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Junction field effect transistor

C257S487000, C257SE29242

Reexamination Certificate

active

07321142

ABSTRACT:
On an SiC single crystal substrate, an electric field relaxation layer and a p− type buffer layer are formed. The electric field relaxation layer is formed between the p− type buffer layer and the SiC single crystal substrate to contact SiC single crystal substrate. On the p− type buffer layer, an n type semiconductor layer is formed. On the n type semiconductor layer, a p type semiconductor layer is formed. In the p type semiconductor layer, an n+ type source region layer and an n+ type drain region layer are formed separated by a prescribed distance from each other. At a part of the region of p type semiconductor layer between the n+ type source region layer and the n+ type drain region layer, a p+ type gate region layer is formed.

REFERENCES:
patent: 7023033 (2006-04-01), Harada et al.
patent: 2003/0168704 (2003-09-01), Harada et al.
patent: 2004/0164354 (2004-08-01), Mergens et al.
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patent: 2000-323499 (2000-11-01), None
patent: 2003-068762 (2003-03-01), None
patent: WO 01/86727 (2001-11-01), None
S. T. Allen et al., “Frequency and power performance of microwave SiE FET's” Inst. Phys. Conf. Ser., No. 142, Chapter 4, IOP Publishing Ltd, 1995 pp. 761-764.

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