Field effect transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

Reexamination Certificate

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C257S195000

Reexamination Certificate

active

10854705

ABSTRACT:
A semiconductor structure a structure with an enhancement mode transistor device disposed in a first region and depletion mode transistor device disposed in a laterally displaced second region. The structure has a channel layer for the depletion mode and enhancement mode transistor devices. An enhancement mode transistor device InGaP etch stop/Schottky contact layer is disposed over the channel layer; a first layer different from InGaP disposed on the InGaP layer; a depletion mode transistor device etch stop layer is disposed on the first layer; and a second layer disposed on the depletion mode transistor device etch stop layer. The depletion mode transistor device has a gate recess passing through the second layer and the depletion mode transistor device etch stop layer and terminating in the first layer. The enhancement mode transistor device has a gate recess passing through the second layer, the depletion mode transistor device etch stop layer, the first layer, and terminating in the InGaP layer.

REFERENCES:
patent: 5686741 (1997-11-01), Ohori et al.
patent: 6274893 (2001-08-01), Igarashi et al.
patent: 6670652 (2003-12-01), Song
patent: 6703638 (2004-03-01), Danzilio
patent: 2002/0177261 (2002-11-01), Song
patent: 1 261 035 (2002-11-01), None
patent: 1 261 035 (2002-11-01), None

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