Field effect regulator with stable feedback loop

Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...

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323280, 323281, 361 18, 361 86, G05F 158

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045366993

ABSTRACT:
A low voltage series pass regulator configuration has an input terminal for receiving a predetermined input voltage and an output terminal operatively connected to a load. The regulator comprises at least one field effect transistor in a source follower configuration. The drain of the field effect transistor is operatively connected to the input terminal and the source is operatively connected to the output terminal which provides an output voltage across the load. In one embodiment of the present invention a current limiter is operatively connected between the source and a gate of the field effect transistor. In another embodiment of the present invention a comparator for comparing the output voltage to a first reference voltage is provided. The comparator supplies a control voltage, indicative of the value of the output voltage compared to the first reference voltage, to the gate of the field effect transistor. This output voltage is indicative of the current drawn by the load and causes the comparator to produce a control voltage on the gate which keeps the output voltage substantially constant.

REFERENCES:
patent: 3546566 (1970-12-01), Marzolf
patent: 4005353 (1977-01-01), Yokoyama
patent: 4382224 (1983-05-01), Miller
patent: 4390833 (1983-06-01), Tzeng
Wu, "Designing Power Supplies with FETS", EEE, vol. 16, No 12, pp. 68, 69, Dec. 1968.
"MOS Power FET's Make Excellent Voltage Regulators", Electr. Eng. vol. 51, No. 618, p. 23, Feb. 1979.
Wyatt, "JFET Minimizes Regulator Differential, Extends Battery Life", Elect. Design, vol. 28, No. 24, pp. 302, 304, Nov. 22, 1980.
Heinzer, "Don't Trade Off Analog-Switch Specs.", Electr. Design 15, pp. 56-60, Jul. 19, 1977.

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