Field effect device with reduced thickness gate

Details Field effect device with reduced thickness gate Field effect device with reduced thickness gate

2006-03-24

2008-12-02

Geyer, Scott B. (Department: 2812)

Semiconductor device manufacturing: process

Forming schottky junction

Using refractory group metal

C438S581000, C438S682000, C257SE21439

Reexamination Certificate

active

07459382

ABSTRACT:
A semiconductor structure is fabricated with reduced gate capacitance by thinning of a gate electrode to provide a reduced thickness gate electrode. The gate electrode is thinned after forming a spacer layer adjoining the gate electrode. In addition, the height of the spacer layer may also be reduced. The spacer layer thus has an enhanced horizontal width desired for locating an intrinsic source/drain with respect to an extension region and in particular, an enhanced horizontal width relative to the spacer height. The reduced thickness gate electrode may be fully silicided to provide decreased gate resistance. A raised source/drain layer may be located upon the intrinsic source/drain region. The raised source/drain layer may have a top surface higher than the reduced thickness gate electrode. In addition, the raised source/drain layer may have a top surface higher than the reduced height spacer layer.

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