Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks
Reexamination Certificate
2011-03-01
2011-03-01
Chu, Chris (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Alignment marks
C257SE25017, C257S773000, C257S774000, C438S462000
Reexamination Certificate
active
07898095
ABSTRACT:
A method for stacking integrated circuit substrates and the substrates used therein are disclosed. In the method, an integrated circuit substrate having top and bottom surfaces is provided. The substrate is divided vertically into a plurality of layers including an integrated circuit layer having integrated circuit elements constructed therein and a buffer layer adjacent to the bottom surface. An alignment fiducial mark extending from the top surface of the wafer into the substrate to a depth below that of the circuit layer is constructed. The vias are arranged in a pattern that provides a fiducial mark when viewed from the bottom surface of the substrate. The pattern can be chosen such that it is recognized by a commercial stepper/scanner/contact mask aligner when viewed from said backside of said wafer. After the substrate is thinned, the alignment fiducial mark is then used to position a mask used in subsequent processing.
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Hong Sangki
Patti Robert
Ramasamy Chockalingam
Chu Chris
Tezzaron Semiconductor, Inc.
Ward Calvin B.
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