Fibre channel loop map initialization protocol implemented...

Details Fibre channel loop map initialization protocol implemented... Fibre channel loop map initialization protocol implemented...

1998-10-30

2002-10-22

Cangialosi, Salvatore (Department: 2661)

Multiplex communications

Channel assignment techniques

Details of circuit or interface for connecting user to the...

C370S503000, C709S222000

Reexamination Certificate

active

06470026

ABSTRACT:

TECHNICAL FIELD
The present invention relates to fibre channel interface controllers used to implement fibre channel ports and, in particular, to a method and system for implementing, in hardware, the final two phases of fibre channel arbitrated loop initialization protocol that concern the construction and the distribution of an arbitrated loop physical address position map.
BACKGROUND OF THE INVENTION
The fibre channel (“FC”) is an architecture and protocol for a data communication network for interconnecting a number of different combinations of computers and peripheral devices. The FC supports a variety of upper-level protocols, including the small computer systems interface (“SCSI”) protocol. A computer or peripheral device is linked to the network through an FC port and copper wires or optical fibres. An FC port includes a transceiver and an interface controller, and the computer peripheral device in which the FC port is contained is called a “host.” The FC port exchanges data with the host via a local data bus, such as a peripheral computer interface (“PCI”) bus. The interface controller conducts lower-level protocol exchanges between the fibre channel and the computer or peripheral device in which the FC port resides.
In one type of FC topology, called the “fibre channel arbitrated loop”, the various interconnected FC ports carry out an arbitrated loop initialization protocol in order to initialize data communications traffic between the FC ports of the arbitrated loop. The arbitrated loop initialization protocol involves a number of different phases. In the first of two final phases of arbitrated loop initialization, the FC ports construct, one-by-one, a position map that represents their relative positions within the arbitrated loop, and, then, in the second of the final two phases, distribute the completed position map amongst themselves. In previous and current implementations of FC interface controllers, these final two phases of the arbitrated loop initialization protocol were either not implemented or were implemented in firmware, so that these final two phases of the arbitrated loop initialization protocol were either not available or were carried out at relatively slow speed. For many reasons, including the necessity for high-availability systems to quickly reinitialize arbitrated loops following a reset of any FC port within the arbitrated loop, it is desirable for the arbitrated loop initialization protocol to operate far more quickly than previous and current implementations allow. A need has therefore been recognized by developers and users of fibre channel interface controllers for an interface controller that implements, in hardware, the arbitrated loop initialization protocol.
SUMMARY OF THE INVENTION
The present invention provides a fibre channel (“FC”) interface controller that implements, in hardware, all phases of the FC arbitrated loop initialization protocol. In particular, the final two phases of the arbitrated loop initialization protocol that involve the construction and distribution of a somewhat lengthy position map are implemented to execute within the FC interface controller, without host computer or host peripheral device intervention. The efficient and economical implementation of the present invention takes advantage of the inherent dynamic buffering capacity of the FC ports interconnected by an FC arbitrated loop and of the fact that relatively large portions of the data exchanged between FC ports of the FC arbitrated loop during arbitrated loop initialization need not be buffered for forwarding, but can instead be generated on the fly during transmission of the data. The minimization of the amount of memory buffer requirements within the interface controller contributes significant cost advantages in the design and production of the interface controller, and simplifies the algorithms and circuitry that implement the FC arbitrated loop protocol. Because the final two phases of the arbitrated loop initialization protocol are implemented to execute within the FC interface controller, without host computer or host peripheral device intervention, the FC arbitrated loop initialization can proceed much faster, decreasing the time that the FC is unavailable for data communications. This is, in turn, important in high-availability systems, where continuous data communications are desirable.


REFERENCES:
patent: 6081847 (2000-06-01), Lin
patent: 6148004 (2000-11-01), Nelson et al.
patent: 6278718 (2001-08-01), Eschholz
patent: 6304910 (2001-10-01), Roach et al.

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