FET overtemperature protection circuit

Details FET overtemperature protection circuit FET overtemperature protection circuit

1989-03-13

1990-01-23

Jennings, Derek S.

H02H 326

Patent

active

048962457

ABSTRACT:
A first signal (V.sub.1) related to FET drain to source voltage and a second signal (V.sub.2) related to FET source current are compared and the FET (11) is turned off when the first signal exceeds the second signal by a predetermined amount. This corresponds to turning the FET off whe the drain to source on resistance of the FET exceeds a FET on resistance value corresponding to a maximum allowable FET die temperature. Thus the FET is turned off for excessive due temperatures to prevent damage to the FET. A start-up circuit (41, 42) is provided to insure proper initial turning on of the FET, and a short circuit protection circuit (30) is provided for turning the FET off it the source current exceeds some maximum current limit. Accurate, effective monitoring of the FET die temperature is provided without the use of an additional temperature sensing element provided adjacent the FET.

REFERENCES:
patent: 4595966 (1986-06-01), Huser et al.
patent: 4771357 (1988-09-01), Lorinez et al.
Motorola Power MOSFET Tansistor Data Book, Third Edition, 1988, pp. 3-717 to 3-723.

Affiliated with

Also associated with

Rating

FET overtemperature protection circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with FET overtemperature protection circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and FET overtemperature protection circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-648575