FET nonvolatile memory with composite gate insulating layer

Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating

Patent

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Details

257288, 257325, 257326, 257506, 257546, 257635, 257637, 257640, 257646, 257649, H01L 2978, H01L 2348, H01L 2946, H01L 2962

Patent

active

052930629

ABSTRACT:
A gate insulating layer, which is formed on a channel region of a semiconductor substrate and interposed between the semiconductor substrate and a gate electrode, consists of a first part and a second part adjoining each other. The first part includes an oxide lower layer and a nitride upper layer, and a second part includes a nitride lower layer and an oxide upper layer.

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