Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor
Patent
1995-05-05
1997-10-14
Prenty, Mark V.
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Field effect transistor
257289, 257776, H01L 310328
Patent
active
056775547
ABSTRACT:
A HIGFET having a gate with a pad which is isolated from the FET heterostructure wafer by a dielectric layer to minimize leakage current between the gate and the wafer. The method of production of this device involves application of the gate metal only over the active area of the FET and a photo resist covering on the gate metal. The wafer, including the area covered by the photo resist, is covered with the dielectric layer. The photo resist layer is removed along with the dielectric layer from over the gate metal. Another layer of gate metal is formed on the preexisting gate metal including a gate pad on part of the remaining dielectric layer.
REFERENCES:
patent: 5124762 (1992-06-01), Childs et al.
patent: 5461244 (1995-10-01), Swirhun
(Fujitsu Ltd.) JP5206456, Patent Abstracts of Japan, vol. 17, No. 640 (E-1465), Aug. 13, 1993.
D.E. Grider et al., "A 4 Kbit Synchronous Static Random Access Memory Based Upon Delta-Doped Complementary Heterostructure Insulated Gate Field Effect Transistor Technology" Oct. 20-23, 1991, Proceedings of the Gallium Arsenide Integrated Circuit Symposium in Monterey, pp. 71-74.
A.I. Akinwande et al., "A Self-Aligned Gate III-V Heterostructure FET Process for Ultrahigh-Speed Digital and Mixed Analog/Digital LSI/VLSI Circuits," Oct. 1, 1989 IEEE Transactions on Electron Devices, vol. 36, No. 10, pp. 2204-2216.
S. Pearton et al. "Ion-beam-induced Intermixing of Wsi.sub.0.45 and GaAs", Aug. 1989 Materials Science & Engineering, vol. B3, No. 3, pp. 273-277.
Honeywell Inc.
Prenty Mark V.
Shudy Jr. John G.
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