FET gate bias circuit

Details FET gate bias circuit FET gate bias circuit

1995-10-18

1997-04-29

Mullins, James B.

Amplifiers

With semiconductor amplifying device

Including field effect transistor

330296, H03F 316

Patent

active

056253230

ABSTRACT:
An FET gate bias circuit having a Schottky barrier gate incorporated therein is provided which can prevent gate voltage variations and thus provide a high-performance, high-reliability GaAs FET amplifier. The FET gate bias circuit includes a PNP transistor having a collector connected to a negative power supply, an NPN transistor having a collector thereof grounded and an emitter connected to the emitter of the PNP transistor, a Schottky barrier gate FET having a source grounded and a gate connected to the node between the emitters of the PNP transistor and NPN transistor, and a base voltage applying circuit for applying predetermined base voltages to the respective bases of the PNP transistor and NPN transistor.

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