FET Buffer amplifier with improved noise rejection

Details FET Buffer amplifier with improved noise rejection FET Buffer amplifier with improved noise rejection

1982-06-28

1984-09-11

Mullins, James B.

Amplifiers

Hum or noise or distortion bucking introduced into signal...

330292, 330300, 330310, H03F 126, H03F 316

Patent

active

044713193

ABSTRACT:
A buffer amplifier circuit is provided in which the effects of power supply noise is substantially reduced while contemporaneously exhibiting the attributes of low thermal distortion and high linearity. The amplifier comprises a source follower input stage which contains additional devices to absorb power supply variations, and an emitter follower output stage. A constant-current bias network includes means for bootstrapping the gate-to-drain capacitance of the input source follower.

REFERENCES:
Erdi, "A 300 V/Ms Monolithic Voltage Follower" IEEE Journal of Solid-State Circuits, vol. SC-14, No. 6, Dec. 1979, pp. 1059-1065.

Affiliated with

Also associated with

Rating

FET Buffer amplifier with improved noise rejection does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with FET Buffer amplifier with improved noise rejection, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and FET Buffer amplifier with improved noise rejection will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1197338