FET buffer amplifier

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307497, 307446, 307570, 307355, 330253, 330254, H03K 3023, H03K 1716, H03K 3013, G06G 712

Patent

active

049163388

ABSTRACT:
An FET buffer amplifier circuit includes two matched FET amplifiers each consisting of an FET transistor source follower biased by a source impedance. One FET transistor source follower receives an input voltage and the second FET transistor source follower is driven by the output of an operational amplifier. The positive and negative inputs of the operational amplifier are respectively coupled to the outputs of each FET transistor source follower. A negative feedback loop is created in which the output voltage of the operational amplifier is equal to the input voltage. The two FET transistors and source impedances are matched and are under substantially identical operating conditions.

REFERENCES:
patent: 3970951 (1976-07-01), Hoffman
patent: 4096430 (1978-06-01), Waldron
patent: 4135162 (1979-01-01), Takahashi
patent: 4301421 (1981-11-01), Yokoyama
patent: 4341963 (1982-07-01), Jensen et al.
patent: 4346344 (1982-08-01), Blauschild
patent: 4425516 (1984-01-01), Wanlass
patent: 4427903 (1984-01-01), Sugimoto
patent: 4451800 (1984-05-01), Nishioka et al.
"Electronics Engineers' Handbook", editor: Donald Fink, McGraw-Hill Book Company, Second edition, pp. 15-19.
"Designing with Field-Effect Transistors", editor: Arthur Evans, McGraw-Hill Book Company, pp. 97, 127.

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