Semiconductor device manufacturing: process – Having magnetic or ferroelectric component
Reexamination Certificate
2000-12-14
2002-06-25
Thomas, Tom (Department: 2811)
Semiconductor device manufacturing: process
Having magnetic or ferroelectric component
C438S239000, C438S253000, C257S295000
Reexamination Certificate
active
06410344
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a ferroelectric random access memory (FeRAM) device; and, more particularly, to a FeRAM device that employs two capacitors with strontium bismuth tantalate (SBT) and lead zirconate titanate (PZT) as capacitor thin films and a method for manufacturing the same.
DESCRIPTION OF THE PRIOR ART
With the recent progress of film deposition techniques, applications of a nonvolatile memory cell using a ferroelectric thin film have increasingly been developed. This nonvolatile memory cell is a high-speed rewritable nonvolatile memory cell utilizing the high-speed polarization/inversion and the residual polarization of the ferroelectric capacitor thin film.
Therefore, a ferroelectric random access memory (FeRAM) where a capacitor thin film with ferroelectric properties such as strontium bismuth tantalate (SBT) and lead zirconate titanate (PZT) is increasingly used for a capacitor thin film in place of a conventional silicon oxide film or a silicon nitride film, because it assures a low-voltage and high-speed performance, and further, does not require periodic refresh to prevent loss of information during standby intervals like a dynamic random access memory (DRAM).
Since a ferroelectric material has a dielectric constant ranging from hundreds to thousands value and stabilized residual polarization property at room temperature, it is being applied to the non-volatile memory device as the capacitor thin film. In the case of employing the ferroelectric capacitor thin film in the non-volatile memory device, information data are stored by polarization of dipoles when an electric field is applied thereto. Even if the electric field is removed, the residual polarization remains so that one of information data, i.e., “
0
” or “
1
”, can be stored.
Referring to
FIG. 1
, there are provided hysterisis loop curves of an applied voltage versus polarization. As shown, if the SBT is used as a capacitor thin film as denoted “A”, there is a drawback that the memory device is hardly operated stably, even though it can be operated at low voltage due to a decrease of V
c
value.
Meanwhile, if the PZT is used as the capacitor thin film as represented “B”, there is also another drawback that the residual polarization is not only increased but V
c
is also increased, whereby it cannot be operated at low voltage.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a a ferroelectric random access memory (FeRAM) device including two capacitors, wherein one capacitor has strontium bismuth tantalate (SBT) as a capacitor thin film and the other has lead zirconate titanate (PZT) as the capacitor thin film.
It is another object of the present invention to provide a method for manufacturing the FeRAM device including two capacitors, wherein one capacitor has SBT as a capacitor thin film and the other has PZT as the capacitor thin film.
In accordance with one aspect of the present invention, there is provided a FeRAM device, comprising: an active matrix provided with a transistor and diffusion regions; a first capacitor structure, formed on a portion of the active matrix, provided with a first capacitor thin film made of strontium bismuth tantalate (SBT); a second capacitor structure, formed on a remaining portion of the active matrix, provided with a second capacitor thin film made of lead zirconate titanate (PZT); and a metal interconnection formed on the first and the second capacitor structures, thereby electrically connecting the first and second capacitors to one of the diffusion regions.
In accordance with another aspect of the present invention, there is provided a method for manufacturing a FeRAM device, the method comprising the steps of: a) preparing an active matrix provided with a transistor and diffusion regions; b) forming a first capacitor structure on a portion of the active matrix, provided with a first capacitor thin film made of SBT; c) forming a second capacitor structure on a remaining portion of the active matrix, provided with a second capacitor thin film made of PZT; and d) forming a metal interconnection on the first and the second capacitor structures, thereby electrically connecting the first and the second capacitor structures to one of the diffusion regions.
REFERENCES:
patent: 6043561 (2000-03-01), Katori et al.
patent: 6204070 (2001-03-01), Kim
patent: 6232133 (2001-05-01), Kim et al.
patent: 6300144 (2001-10-01), Wouters et al.
patent: 6315913 (2001-11-01), Engelhardt et al.
Hyundai Electronics Industries Co,. Ltd.
Jacobson & Holman PLLC
Owens Douglas W.
Thomas Tom
LandOfFree
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