Ferroelectric memory and method for fabricating the same

Semiconductor device manufacturing: process – Having magnetic or ferroelectric component

Reexamination Certificate

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C438S240000, C438S238000, C438S244000, C257S068000, C257S071000, C257S295000, C257S296000, C257S303000, C257S306000

Reexamination Certificate

active

06794199

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a ferroelectric memory including a plurality of ferroelectric capacitors, each of which has a lower electrode, a capacitor dielectric film of a ferroelectric film and an upper electrode formed successively on a semiconductor substrate, arranged in a matrix shape along a word line direction and a bit line direction, and a method for fabricating the ferroelectric memory.
Recently, a nonvolatile ferroelectric memory including a capacitor dielectric film made from a ferroelectric material having a hysteresis characteristic, such as SrBi
2
Ta
2
O
9
(hereinafter referred to as SBT) or Pb(Zr, Ti)O
3
(hereinafter referred to as PZT), has been developed. The ferroelectric material such as SBT or PZT used in this ferroelectric memory is a ferroelectric oxide.
Therefore, the ferroelectric oxide is reduced if it is exposed to a reducing atmosphere or a hydrogen atmosphere in particular during annealing performed in an atmosphere including hydrogen for securing the characteristic of a MOS transistor formed on a semiconductor substrate after forming aluminum wires above a plurality of ferroelectric capacitors with an interlayer insulating film sandwiched therebetween or during CVD performed for filling a tungsten film in a contact hole with an aspect ratio sufficiently high for reducing the size of the semiconductor memory. As a result of the reduction, the crystal composition of the ferroelectric oxide is broken, so that the insulating property of the capacitor dielectric film or the characteristic of the ferroelectric oxide can be largely degraded.
Accordingly, in order to prevent the capacitor dielectric film of the ferroelectric capacitor from being reduced through the exposure to hydrogen even when the ferroelectric capacitor is subjected to annealing performed in a hydrogen atmosphere after forming it, a hydrogen barrier film for preventing hydrogen from invading the capacitor dielectric film is formed over the ferroelectric capacitor.
In the case where the hydrogen barrier film is formed between the ferroelectric capacitor and an interlayer insulating film formed thereon, the area of the hydrogen barrier film should be larger than that of the ferroelectric capacitor by at least several &mgr; m for preventing the hydrogen from invading in a horizontal direction. Also, since the hydrogen barrier film is formed also on a contact plug buried in the interlayer insulating film, if the contact plug is made from a tungsten film formed by the CVD, the effect of the hydrogen barrier film to prevent the hydrogen invasion of the capacitor dielectric film is lowered.
In particular, the area of the ferroelectric capacitor has recently been reduced (to 1 &mgr; m
2
or less) due to the size reduction of the ferroelectric memory, and for the above-described reason, the hydrogen invasion of the capacitor dielectric film cannot be definitely prevented merely by covering the ferroelectric capacitor with the hydrogen barrier film.
As a countermeasure, Japanese Laid-Open Patent Publication No. 11-135736 has proposed a ferroelectric memory having a structure as shown in FIG.
6
.
Now, the ferroelectric memory of
FIG. 6
will be described as a conventional example.
An isolation region
11
and impurity diffusion layers
12
serving as a source and a drain are formed in surface portions of a silicon substrate
10
. A gate electrode
13
is formed on the silicon substrate
10
with a gate insulating film sandwiched therebetween in a portion between the impurity diffusion layers
12
. The gate electrode
13
and the impurity diffusion layers
12
together form a field effect transistor.
A first interlayer insulating film
14
is formed on the field effect transistor and the isolation region
11
, and a first insulating hydrogen barrier film
15
is formed on the first interlayer insulating film
14
above the isolation region
11
. A ferroelectric capacitor including a lower electrode
16
, a capacitor dielectric film
17
of a ferroelectric film and an upper electrode
18
is formed on the first insulating hydrogen barrier film
15
. A conducting hydrogen barrier film
19
is formed on the upper electrode
18
, and a second insulating hydrogen barrier film
20
is formed on the top face of the conducting hydrogen barrier film
19
and the side faces of the lower electrode
16
, the capacitor dielectric film
17
and the upper electrode
18
. Thus, the ferroelectric capacitor is completely covered with the first insulating hydrogen barrier film
15
, the conducting hydrogen barrier film
19
and the second insulating hydrogen barrier film
20
.
A second interlayer insulating film
21
is formed on the first interlayer insulating film
14
and the second insulating hydrogen barrier film
20
. A metal wire
22
is formed on the second interlayer insulating film
21
, and the metal wire
22
is connected to a contact plug
23
buried in the first interlayer insulating film
14
and the second interlayer insulating film
21
.
Since the ferroelectric capacitor is completely covered with the first insulating hydrogen barrier film
15
, the conducting hydrogen barrier film
19
and the second insulating hydrogen barrier film
20
as described above, the hydrogen invasion of the capacitor dielectric film
17
can be prevented.
In this conventional ferroelectric memory, however, a side portion of the second insulating hydrogen barrier film
20
may disappear or be reduced in its thickness due to mask shift occurring in patterning the second insulating hydrogen barrier film
20
.
Therefore, it is necessary to increase the thickness of the second insulating hydrogen barrier film
20
and to increase the margin of a mask used for pattering the second insulating hydrogen barrier film
20
.
As a result, it is necessary to increase the intervals between ferroelectric capacitors, which disadvantageously makes it difficult to reduce the size of the ferroelectric memory.
SUMMARY OF THE INVENTION
In consideration of the aforementioned conventional problem, an object of the invention is definitely preventing hydrogen from invading a capacitor dielectric film of a ferroelectric capacitor as well as reducing the size of a ferroelectric memory.
In order to achieve the object, the ferroelectric memory of this invention comprises a plurality of ferroelectric capacitors, each of which includes a lower electrode, a capacitor dielectric film of a ferroelectric film and an upper electrode successively formed on an interlayer insulating film on a semiconductor substrate, the plurality of ferroelectric capacitors being arranged along a word line direction and a bit line direction, a first insulating hydrogen barrier film is filled between the lower electrodes of some ferroelectric capacitors, among the plurality of ferroelectric capacitors, that are arranged along one direction out of the word line direction and the bit line direction, the capacitor dielectric film is formed as a common capacitor dielectric film commonly used by the some ferroelectric capacitors arranged along the one direction and formed on the lower electrodes of the some ferroelectric capacitors arranged along the one direction and on the first insulating hydrogen barrier film, the upper electrode is formed as a common upper electrode commonly used by the some ferroelectric capacitors arranged along the one direction and formed on the common capacitor dielectric film, and a second insulating hydrogen barrier film is formed to cover the common upper electrode.
In the ferroelectric memory of this invention, the first insulating hydrogen barrier film is filled between the lower electrodes of the plural ferroelectric capacitors arranged in one direction out of the word line direction and the bit line direction. Therefore, there is no need to pattern the first insulating hydrogen barrier film in regions between the lower electrodes of the ferroelectric capacitors arranged in the one direction, and hence, there is no need to secure a dimensional margin between the lower electrodes in consideration of shift of a m

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