Ferroelectric memory

Details Ferroelectric memory Ferroelectric memory

2007-02-27

2007-02-27

Tran, Minh-Loan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular signal path connections

C257S295000, C257S296000, C257SE27085

Reexamination Certificate

active

10919403

ABSTRACT:
A ferroelectric memory has a plurality of memory cells each having a transistor and a ferroelectric capacitor arranged in a matrix. Plate lines run in the word line direction above the ferroelectric capacitors of memory cells adjacent to each other in the word line direction among the plurality of memory cells. Bit line contacts each for connecting a bit line and an active region of the transistor are placed in regions between the plate lines adjacent to each other in the bit line direction and between the ferroelectric capacitors adjacent to each other in the word line direction. Cuts are formed at positions of the plate lines near the bit line contacts. The active regions of the transistors of the plurality of memory cells extend in directions intersecting with the word line direction and the bit line direction.

REFERENCES:
patent: 6497992 (2002-12-01), Yunogami et al.
patent: 2002/0031885 (2002-03-01), Takashima
patent: 2003/0169616 (2003-09-01), Noro

Affiliated with

Also associated with

Rating

Ferroelectric memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Ferroelectric memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Ferroelectric memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3816968