Fermi threshold field effect transistor

Details Fermi threshold field effect transistor Fermi threshold field effect transistor

1989-06-22

1991-01-08

Hille, Rolf

357 2312, H01L 2978, H01L 2986

Patent

active

049840436

ABSTRACT:
A field effect transistor (FET) operates in the enhancement mode without requiring inversion by setting the device's threshold voltage to twice the Fermi potential of the semiconductor material. The FET, referred to as a Fermi Threshold FET or Fermi-FET, has a threshold voltage which is independent of oxide thickness, channel length, drain voltage and substrate doping. The vertical electric field in the channel becomes zero, thereby maximizing carrier mobility, and minimizing hot electron effects. A high speed device, substantially independent of device dimensions is thereby provided, which may be manufactured using relaxed groundrules, to provide low cost, high yield devices.
Temperature dependence of threshold voltage may also be eliminated by providing a semiconductor gate contact which neutralizes the effect of substrate contact potential. Source and drain subdiffusion regions may be provided to simultaneously maximize the punch-through and impact ionization voltages of the devices, so that short channel devices do not require scaled-down power supply voltages. Multi gate devices may be provided. An accelerator gate, adjacent the drain, may further improve performance.
The Fermi-FET criteria may be maintained, while allowing for a deep channel by providing a substrate contact for the Fermi-FET and applying a substrate bias to this contact. Substrate enhancement pocket regions adjacent the source and drain regions may be provided to produce a continuous depletion region under the source, drain and channel regions to thereby minimize punch-through effects.

REFERENCES:
patent: 3653978 (1972-04-01), Robinson et al.
patent: 3789504 (1974-02-01), Jaddam
A Normally-Off Type Buried Channel MOSFET for VLSI Circuits; by K. Nishiuchi et al. (IEDM Technical Digest, 1979, pp. 26-29).

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