Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2006-03-07
2006-03-07
Tran, Michael (Department: 2827)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S196000
Reexamination Certificate
active
07009907
ABSTRACT:
The present invention discloses a non-volatile ferroelectric memory device having a sensing voltage control circuit. The non-volatile ferroelectric memory device having a sensing voltage control circuit comprises: a plurality of cell array blocks having a hierarchy bit line architecture having main bit lines and sub bit lines; a plurality of sense amplifier units sensing a voltage on the main bit line according to a sensing detection threshold voltage, and adjusting a level of the sensing detection threshold voltage according to a temperature; a data bus transferring a read/write data; and a main amplifier amplifying the read data, and outputting the amplified read data. Therefore, the FeRAM of the present invention enables a stable data sensing by compensating through the sense amplifier the signal transfer characteristics of the main bit line according to the temperature change.
REFERENCES:
patent: 6272594 (2001-08-01), Gupta et al.
patent: 6363439 (2002-03-01), Battles et al.
patent: 6829154 (2004-12-01), Kang
patent: 6836439 (2004-12-01), Kang
patent: 1998-14400 (2000-07-01), None
Hynix / Semiconductor Inc.
Tran Michael
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