Feedforward sigma-delta ad converter with an optimized...

Details Feedforward sigma-delta ad converter with an optimized... Feedforward sigma-delta ad converter with an optimized...

2006-12-04

2009-06-30

Young, Brian (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

C341S155000

Reexamination Certificate

active

07554474

ABSTRACT:
The present invention relates to a receiver apparatus, analog-to-digital converter apparatus, and method of converting an analog input signal into a digital output signal, wherein an additional direct feedforward path is introduced to compensate for peaking of feedforward structures while preserving frequency selectivity of the feedforward topology. In particular, the direct feedforward path (72) is provided with a scaling by a direct feedforward coefficient (ao) greater than zero and less than one. As a result, overshoot or peaking of classical feedforward topologies can be suppressed while providing interferer immunity, anti-aliazing effects and loop stability.

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patent: 7411534 (2008-08-01), Melanson
Schmiper, M; et al “A 3MW Continuous-Time /SPL Sigma//SPL Delta/-Modulator for Edge/GSM With High Adjacent Channel Tolerance” Proceedings of the 30th European Solid-State Circuits Conference, 2004. ESSCIRC 2004. Sep. 21, 2004, pp. 183-186.
Silva, J; et al “Wideband Low-Distortion Delta-Sigma ADC Topology” Electronics Letters, IEE Stevenage, GB, vol. 37, No. 12, Jun. 7, 2001, pp. 737-738.
Philips, K; et al “A Continuous-Time /SPL Sigma/SPL Delta/ADC With Increased Immunity to Interferers” IEEE Journal of Solid-State Circuits, vol. 39, No. 12, Dec. 2004, pp. 2170-2178.
Van Der Zwan, E; et al “A 0.2-MW CMOS /SPL Sigma/SPL Delta/ Modulator for Speech Coding With 80DB Dynamic Range” IEEE Journal of Solid-State Circuits, vol. 31, Issue 12, Dec. 1996, pp. 1873-1880.

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