Feed forward equalizer and a method for analog equalization...

Pulse or digital communications – Equalizers – Automatic

Reexamination Certificate

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C375S229000, C375S350000

Reexamination Certificate

active

10808167

ABSTRACT:
A feed forward equalizer for analog equalization of a data signal received over a data transmission channel comprising a Master Delay Locked Loop (MDLL) for generating equidistant reference phase signals; a Slave Delay Line (SDL) formed by serial connected Slave Delay Units (SDU), wherein each Slave Delay Unit (SDU) has a Slave Delay Element (SDE) to delay the received data signal with a predetermined delay time (ΔT) and an analog amplifier which amplifies the delayed output signal of the Slave Delay Element (SDE) with a respective weighting coefficient to generate a weighted delay signal, wherein the analog amplifier is switched transparent in response to a corresponding reference phase signal generated by said Master Delay Locked Loop (M-DLL); and subtracting means for subtracting the weighted delay signals which are selected by means of a multiplexer from the received data signal to generate an equalized output data signal.

REFERENCES:
patent: 5646958 (1997-07-01), Tsujimoto
patent: 5930296 (1999-07-01), Kot
patent: 2005/0135473 (2005-06-01), Asuri et al.

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