Fault tolerant system for bubble memories

Details Fault tolerant system for bubble memories Fault tolerant system for bubble memories

1977-10-28

1979-02-13

Moffitt, James W.

Static information storage and retrieval

Magnetic bubbles

365 15, G11C 1908

Patent

active

041398866

ABSTRACT:
A logic system is disclosed for using a memory device of the serial read type having redundant elements in excess of the nominal memory size and consists of a Programmable Read Only Memory having a defect map programmed into it with respect to the associated memory device, a shift register of a predetermined length equivalent to the maximum number of allowable defects, a multiplexer associated with the shift register, a position counter for controlling the multiplexer and, finally, appropriate logic to control the system. This system is disclosed in connection with a bubble memory system of the field access major loop -- minor loop type having extra minor loops. As defects are encountered in writing, data is shifted through the shift register while the multiplexer is incremented to the proper output position of the shift register based on the number of encountered defects. As data is read, an analogous reverse to writing operation is performed with the multiplexer being decremented. In either writing or reading, the multiplexer will never be shifted more than one position for each data bit.

REFERENCES:
patent: 3909810 (1975-09-01), Naden et al.
patent: 4073012 (1978-02-01), Ohnigian

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