Fault tolerant smart card

Registers – Coded record sensors – Error checking

Patent

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Details

235438, 235380, 235492, G06K 500

Patent

active

049085026

ABSTRACT:
A fault tolerant smart card is provided having primary functional units including a standard ISO interface, a first microcontroller, a clock, and main memory. Secondary functional units including a secondary microcontroller, secondary memory with bit checking capability and an alternate battery power source are also provided. A microcontroller error detector is connected to both microcontrollers. Should a discrepancy between microcontrollers occur known test patterns are run on the second microcontroller to determine which microcontroller is faulty. A private access port provides alternate access to information stored in the fault tolerant smart card. Registers for funds remaining, error condition and access account are also provided.

REFERENCES:
patent: 4780602 (1988-10-01), Kawana et al.
patent: 4829166 (1989-05-01), Froelich
patent: 4859837 (1989-08-01), Halpern

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