Fault-tolerant real time clock

Details Fault-tolerant real time clock Fault-tolerant real time clock

1985-09-26

1987-02-17

Shaw, Gareth D.

Boots, shoes, and leggings

371 36, 371 61, 307219, G06F 104

Patent

active

046444980

ABSTRACT:
Three hardware real time clock subcircuits are connected in a triple modular redundancy configuration to assure continued operation if one subcircuit fails. A power supply or processor failure will not cause a clock supplying other processors to fail. Output of voted master clock pulses to the counter in every subcircuit is inhibited until all power supplies are turned on and stabilized, and the time base of the real time clock pulses is variable. The output pulses of all subcircuits are voted on and the voter output is the real time clock. The master clock can be the processor clock.

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