Fault-tolerant CCD memory chip

Details Fault-tolerant CCD memory chip Fault-tolerant CCD memory chip

1975-06-30

1976-10-12

Robinson, Thomas A.

Communications: electrical

Digital comparator systems

340173R, G11C 1134

Patent

active

039861791

ABSTRACT:
The invention comprises a CCD memory chip. A CCD chip is comprised of a plurality of arrays, each of which is in turn comprised of a plurality of CCD registers. A serial addressing system may be used to determine which of the arrays is accessed. Fault-tolerance with respect to defective arrays is achieved by the combination of having only the address circuits for properly functioning arrays form the bits of an N-bit addressing shift register, (whereas the address circuits for improperly functioning arrays are shorted such that they do not form a bit of the N-bit address shift register,) and disabling the voltage delivered to a faulty array. The control circuitry includes the address circuitry and further includes means for controllably providing power to the array components. A plurality of arrays comprises a chip having pads for connecting the chip to the rest of the system.

REFERENCES:
patent: 3750116 (1973-07-01), Kemerer
patent: 3772652 (1973-11-01), Hilberg
patent: 3855580 (1974-12-01), Lighthall et al.
patent: 3886528 (1975-05-01), Irani et al.

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