Fault-tolerant boot strap mechanism for a multiprocessor system

Details Fault-tolerant boot strap mechanism for a multiprocessor system Fault-tolerant boot strap mechanism for a multiprocessor system

1995-12-28

1998-03-03

Coleman, Eric

39580032, 395739, G06F 15177

Patent

active

057245274

ABSTRACT:
A multiprocessor computing system includes a serial bus and implements a boot protocol in which each processor compares a vector field of a boot message issued on the serial bus by a first processor with an ID of the processor; a match indicating that the first processor is a bootstrap processor (BSP). The non-BSPs are halted and, after issuing a final message on the bus, the BSP fetches code to start a reset sequence. The BSP then sends a message to wake the non-BSPs, after which time the operating system software is given control. Faulty processors that fail to participate in the boot protocol do not stop the selection of a BSP as long as one processor in the system is functional.

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