Fault simulator of creating a signal pattern for use in a fault

Details Fault simulator of creating a signal pattern for use in a fault Fault simulator of creating a signal pattern for use in a fault

1997-05-22

1999-05-11

Nguyen, Hoa T.

Excavating

371 251, 371 26, 364578, G01R31/28

Patent

active

059035803

ABSTRACT:
A fault simulator comprises a storage for storing a truth table that is a fault model, a simulation executing unit for executing a simulation on the basis of a given signal pattern by the use of the truth table stored in the storage, a simulation result judging unit for analyzing a result of the simulation by the simulation executing unit and judging whether a fault in a circuit to be inspected can be detected by the signal pattern, and a judgment result output device for displaying a judgment result by the simulation result judging unit, characterized in that the truth table stored in the storage is created in such a way as to reflect a fault of an internal circuit in a block realizing one function forming the semiconductor integrated circuit, the fault making the output of the block high impedance.

REFERENCES:
patent: 5479414 (1995-12-01), Keller et al.
patent: 5596586 (1997-01-01), Sakai
Verifault-XL Training Course, "Conceptual Overview", Rev. 3.0, pp. 2-3 and 2-5.

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