Electricity: motive power systems – Induction motor systems – Primary circuit control
Reexamination Certificate
2000-04-28
2002-01-01
Nappi, Robert E. (Department: 2837)
Electricity: motive power systems
Induction motor systems
Primary circuit control
C318S434000, C361S023000, C363S056070
Reexamination Certificate
active
06335608
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to fault protection circuitry for a motor controller circuit and, more specifically, to a soft shutdown circuit responsive to an overcurrent condition (such as a short circuit) in the motor controller, and a desaturation short circuit protection circuit for the motor controller.
2. Description of the Related Art
Referring to
FIG. 1
, a prior art pulse width modulated motor controller inverter circuit
2
is shown. Motor controller circuit
2
is a three phase motor controller bridge that includes six IGBT or FET switching devices
4
,
6
,
8
,
10
,
12
, and
14
. The switching devices are switched by an appropriate pulse width modulated (PWM) waveform generated by gate drive circuitry contained in control block
16
. Each switch pair (U:
4
and
6
, V:
8
and
10
, W:
12
and
14
) includes a high side switch (
4
,
8
,
12
) and a low side switch (
6
,
10
,
14
), respectively. The switches typically are controlled such that when the high side switch is on, the low side switch is off, and vice versa.
A typical waveform for inverter circuit
2
is shown in the state diagram of FIG.
2
. The high state of the U, V, and W signals indicates that the high side switch is on and the low side switch is off within the corresponding leg, and the low state of each leg signal represents that the high side switch of the corresponding leg is off and the low side switch of that leg is on.
FIG. 3
is a simplified functional diagram of the prior art inverter circuit
2
illustrating the state of switches
4
,
6
,
8
,
10
,
12
, and
14
at the moment of an over-current condition labeled OC in FIG.
2
. Typically, in the prior art circuit, when an over-current condition is detected, only the closed or conducting switching devices (
4
,
10
, and
14
) are softly turned-off and put in a weakly pulled down condition, while the other switches (
6
,
8
, and
12
) remain active and follow the incoming PWM gate input signals.
Consequently, when the phase V leg makes a transition from low to high after the OC condition shown in
FIG. 2
, the voltage potential at the point between switches
8
and
10
will make a fast transition from DCBUS(−) to DCBUS(+) as a result of switch
8
turning on. This fast switching of switch
8
can cause an induced turn-on of switch
10
, creating a new shoot-through short circuit condition due to the Miller capacitance combined with the soft shutdown high impedance placed on the switch
10
gate.
Another problem associated with a typical motor controller inverter circuit, such as that shown in
FIG. 1
, is that an earth-fault can occur as a result of insulation breakdown. This can create a short-circuit by contact with the chassis. During an earth-fault condition, the short-circuit current does not flow in the negative DC bus rail; thus, only the high-side switches need protection against an earth fault.
Referring to
FIG. 4
, an equivalent prior art circuit
17
of the earth-fault short circuit is shown. During the earth fault, the rate of rise of the current depends on the inductance L of the current path between the voltage source
18
and the power transistor
19
; however, inductance L of the current path cannot be predicted by the circuit designer, as it depends on the actual location of the insulation breakdown.
Referring to
FIG. 5
, a conventional approach to earth-fault detection consists of a sense resistor
20
disposed on the positive DC bus rail. An optocoupler
22
provides high side/low side isolation and transfers the fault information to the low side. The inverter shuts down when the positive DC bus rail current exceeds a trip level of fault detection circuitry. The trip level should be set at a level that accurately defines the occurrence of a fault condition. The implementation is relatively simple.
One problem with the prior art earth-fault detection scheme of
FIG. 5
is that the large inductance slows down the rate of rise of current, which then takes too long to build up to the trip level. See FIG.
6
. As a result, high current passes through the IGBT transistor switch, which can result in excessive power dissipation and increase the temperature beyond the limits of the silicon. Thus, the IGBT can be damaged before fault detection occurs.
SUMMARY OF THE INVENTION
The circuitry of the present invention overcomes problems in the prior art, such as those noted above, by implementing a soft shutdown of all six switching devices of a motor controller circuit upon the occurrence of a fault condition, terminating all switching action. Consequently, there is no potential false turn-on problem due to additional switching and the associated Miller effect. In addition, the present invention provides circuitry for short-circuit protection that senses the V
CE
of a power transistor switching device using DESAT circuitry in a gate driver IC. Upon the occurrence of a short-circuit, the power transistor switch is pulled out of its low on-state voltage and the output characteristics are driven up. The DESAT function is provided for each high side IGBT; however, it is enabled only when the IGBT is on.
Other features and advantages of the present invention will become apparent from the following description of the invention which refers to the accompanying drawings.
REFERENCES:
patent: 5173848 (1992-12-01), Roof
patent: 5416692 (1995-05-01), Shimzu et al.
patent: 5684681 (1997-11-01), Huh
patent: 5771162 (1998-06-01), Kwon
patent: 5929665 (1999-07-01), Ichikawa et al.
patent: 6097582 (2000-08-01), John et al.
International Rectifier Corporation
Leykin Rita
Nappi Robert E.
Ostrolenk Faber Gerb & Soffen, LLP
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