Fault isolation for multiphase clock signals supplied to dual mo

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371 54, 371 683, 364739, G06F 772, G06F 1100

Patent

active

050816292

ABSTRACT:
A clock error detection system is provided for a data processing system that employs multiphase clock signals and dual, substantially identical electronic modules. The clock error detection system employs one clock error detection circuit on one module and a second clock error detection circuit on the other electronic module. An error collector is coupled to the first and second clock error detection circuits on both modules to receive the fault signals. Two complementary residue code generators with different moduli are used in each electronic module to generate clock phase error detection signals, which may be used to detect either missing or extra clock phases.

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