Fault isolation diagnostics

Details Fault isolation diagnostics Fault isolation diagnostics

1991-07-03

1994-04-12

Atkinson, Charles E.

Excavating

G01R 3128

Patent

active

053032462

ABSTRACT:
Processes for diagnosing boundary scan observed data produced pursuant to boundary scan testing of interconnected circuit devices having three-state bidirectional scan cells. A first set of observed data is produced by controlling each device individually to drive the I/O pins of the device pursuant to a set of test patterns and to scan out observed values, while the three-state bidirectional scan cells of the other devices that are in the high impedance state. The observed values for each device are diagnosed by a process that analyzes the observed data and refers to a pin connection list to isolate as to the pins of each device stuck-at faults, shorted pin faults, open faults between pins, and hardwire faults. A second set of observed data is produced by controlling each device in turn to be a driving device for driving its I/O pins to a first logical state, while the remaining devices are controlled to have their scan cells in the high impedance state and to scan out the signals observed on their I/O pins. The observed data is compared against expected data, and the observed data that is different from the expected data is diagnosed by a process that refers to a pin connection list and identifies short and open faults between receiving pins and respective driving devices.

REFERENCES:
patent: 4542509 (1985-09-01), Buchanan et al.
patent: 5054024 (1991-10-01), Whetsel
patent: 5056093 (1991-10-01), Whetsel
patent: 5172377 (1992-12-01), Robinson et al.
patent: 5210759 (1993-05-01), DeWitt et al.

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