Fault isolating to a block of ROM

Excavating

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371 211, 371 251, 371 671, G11C 2900

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active

058319883

ABSTRACT:
Apparatus for fault isolating errors in memory elements. A test "Signature" word is obtained by successively manipulating all of the words in a memory block. A first embodiment uses serial processing and a second embodiment uses parallel processing. In either process, prior to test, a derived signature is provided, which is the same as the resulting test signature for each block if no error is detected, and which are stored in test order prior to testing. In either embodiment, after each test signature word is obtained from a block of data, the test signature word is compared bit for bit with the corresponding derived Signature word, and if the two are not identical, an error is indicated. Any block addresses which contain errors are marked in a Fault Address RAM which can be read by external equipment to avoid the use of the faulty blocks.

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patent: 5301199 (1994-04-01), Ikenaga et al.
patent: 5303192 (1994-04-01), Baba
patent: 5355342 (1994-10-01), Ueoka
patent: 5388104 (1995-02-01), Shisotori et al.

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