Fault detection system for inverter

Electricity: motive power systems – Induction motor systems – Primary circuit control

Reexamination Certificate

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Details

C318S811000, C363S056070, C363S098000

Reexamination Certificate

active

11044297

ABSTRACT:
An inverter fault detection system of the present invention is provided with: bus voltage monitor means for monitoring the bus voltage of a three-phase inverter; output voltage monitor means for summing the phase output voltages coming from the three-phase PWM inverter, and for outputting the resulting summed output voltage through a filter having a low-pass characteristic of passing through only the cutoff frequency lower than the PWM carrier frequency; and fault determination means for determining that the three-phase PWM inverter is in the faulty state when the output voltage coming from the output voltage monitor means is almost the same as the voltage value corresponding to 3/2 times of the bus voltage monitored by the bus voltage monitor means.

REFERENCES:
patent: 4832133 (1989-05-01), Boys
patent: 5650708 (1997-07-01), Sawada et al.
patent: 6335600 (2002-01-01), Kasai et al.
patent: 04-087553 (1992-03-01), None
patent: 04-091661 (1992-03-01), None
patent: 2002-345283 (2002-11-01), None
patent: 2003-237597 (2003-08-01), None

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