Fault detection in a redundant power converter

Details Fault detection in a redundant power converter Fault detection in a redundant power converter

2000-03-07

2002-06-18

Patel, Rajnikant B. (Department: 2838)

Electricity: electrical systems and devices

Safety and protection of systems and devices

With specific quantity comparison means

C323S282000

Reexamination Certificate

active

06407899

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to voltage regulators, and more particularly, to detecting a fault condition in a voltage regulator.
BACKGROUND OF THE INVENTION
Voltage regulator devices typically maintain terminal voltages of voltage sources within required limits despite variations in input voltages or loads. Industry standard voltage regulators, also known as DC/DC converters, are generally not fault tolerant, thus the output of the regulator goes out of regulation during a fault. Most of the point-of-load power converters in server systems, like the voltage regulator modules (VRMs) for Intel processors, are of the same topology: non-isolated, step-down (buck) converters with synchronous rectification. A basic schematic diagram of a standard buck converter is illustrated in FIG.
1
. The distinguishing feature of a synchronous buck converter is that a lower switch S
2
is implemented by a diode
10
in parallel with a field effect transistor (FET)
12
. Switch S
2
and a high-side switch S
1
, formed by a FET
14
, are controlled in a complementary fashion, such that either one or the other switch, but not both switches, is ON, except for a small ‘dead-time’ provided by a control unit
18
, when only the diode
10
conducts. Efficiency is achieved by the arrangement, because the losses of existing FET devices are generally better than those of existing diode devices. The arrangement further allows current to flow through S
2
in reverse, and thus synchronous converters can regulate down to zero DC load.
Synchronous switching regulators have drive signals for the switches
12
and
14
. A switching node, V
1
, acts as a summing point of switches S
1
, S
2
, and inductor
19
(L
1
). Under normal operations, the voltage at V
1
is a trapezoidal waveform, which is HIGH when S
1
is ON and LOW when S
2
is ON. The waveform at V
1
is then chopped down by a filter formed by the inductor
19
and a capacitor
21
(C
1
). In order to keep the output voltage ripple at low levels required by the load, e.g., a CPU, the corner frequency of the L
1
-C
1
filter is usually kept at least
10
times lower in frequency than the minimum switching frequency of the converter.
Faults in a voltage regulator can be problematic and are usually not detected until the regulator goes out of tolerance by a fault detection device coupled to the output of the regulator. “Up-time” is becoming increasingly important in servers as the servers take on tasks once performed by ultra-reliable mainframes. Redundancy is the typical method used to achieve a high degree of basic reliability in servers.
FIG. 2
illustrates a plurality of redundant voltage regulator modules
20
. VRM
1
to VRMn, which are coupled in parallel to a sensitive load device
22
, e.g., a CPU, such that if one VRM
20
goes down,. another VRM takes over. Without fault detection hooks to sense failures in redundant elements and a way in which to report them, however, redundancy is significantly less useful.
The failure of a high-side switch S
1
is particularly common and troublesome, since the failure results in an overvoltage on the output. In standard VRMs, a separate independent crowbar, which blows the input fuse, is often utilized. Unfortunately, for parallel converter arrangements, the output voltage goes out of regulation before the circuit acts (i.e., blows a fuse), and there is no guarantee that the fuse will blow in a faulty VRM before the fuse blows in a non-faulty VRM.
Accordingly, what is needed is a method and system for detecting faults in a voltage regulator module before the output voltage goes out of regulation.
SUMMARY OF THE INVENTION
The present invention provides aspects for detecting faults in a redundant power converter. In an exemplary circuit aspect, a circuit for sensing faults in a redundant power converter includes a first voltage level detection mechanism and a second voltage level detection mechanism. The first voltage level detection mechanism detects a voltage level at a predetermined node relative to a first switch gate voltage during a first switch on-time. The second voltage level detection mechanism detects a voltage at the predetermined node relative to a second switch gate voltage during a second switch on-time, wherein a fault is detected when the voltage level violates a threshold level in one of the first voltage level detection mechanism and the second voltage level detection mechanism.
Through the present invention, fault conditions in both high side and low side switches in redundant voltage regulators are detected in an efficient and effective manner. Improved redundant power converter operation results, since faults can be detected before an overvoltage situation occurs. These and other advantages of the aspects of the present invention will be more fully understood in conjunction with the following detailed description and accompanying drawings.


REFERENCES:
patent: 4642807 (1987-02-01), Commroe et al.
patent: 5982652 (1999-11-01), Simonelli et al.
patent: 6097582 (2000-08-01), Jhon et al.

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