Fault detection and isolation system

Details Fault detection and isolation system Fault detection and isolation system

1978-06-15

1980-11-11

Atkinson, Charles E.

Excavating

307219, G06F 1116

Patent

active

042336821

ABSTRACT:
The invention provides data processing duplication and internal error checking within an integrated circuit chip at intermediate points along the logic chain. In one aspect of the invention, duplicate functional logic within the chip is utilized together with multiple fault detectors to provide error checking of the primary logic chain, mechanical interconnection failures, and power and clock pulse checking. The detectable failures are both transient and hard failures. Other problems are in addition resolvable by utilization of duplicate complementary logic in place of duplicate functional logic, such other problems including chip contamination during manufacture, mask problems and functional design problems. The multiple fault detectors provide a multiplicity of error signals which are multiplexed within the chip to produce encoded output error signals each of which designates the fault which has been detected within the chip. These encoded error signals are routed to a special error handling chip which receives encoded error signals from a large number of places, such as a group of chips or circuit cards, and by correlating the information contained in the encoded error signals is able to identify the source of the error as a particular VLSI chip, the interconnections between VLSI chips, a particular circuit card, a power supply line to a circuit card or a group of such cards, or other faults.

REFERENCES:
patent: 3051387 (1962-08-01), Pomerene et al.
patent: 3509532 (1970-04-01), Vande Wege
patent: 3517174 (1970-06-01), Ossfeldt
patent: 3646516 (1972-02-01), Flinders et al.
patent: 3751685 (1973-08-01), Jaeger
patent: 3770948 (1973-11-01), Caputo et al.
patent: 3803568 (1974-04-01), Higashide
patent: 4020460 (1977-04-01), Jones et al.
Sellers et al., Error Detecting Logic and Digital Computers, McGraw-Hill Co., 1968, pp. 207-211.
Geng et al., Circuit for the Complete Check of a Data-Processing System, IBM Tech. Discl. Bulletin, vol. 16, No. 4, Sep. 1973, pp. 1144-1145.

Affiliated with

Also associated with

Rating

Fault detection and isolation system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Fault detection and isolation system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Fault detection and isolation system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1695087