Fault block detecting system using abnormal current and abnormal

Details Fault block detecting system using abnormal current and abnormal Fault block detecting system using abnormal current and abnormal

1997-11-14

1999-01-26

Beausoliel, Jr., Robert W.

Excavating

324765, S06F 1100

Patent

active

058645667

ABSTRACT:
In a semiconductor device formed by a plurality of logic blocks, plurality of functional test patterns are generated and transmitted to the semiconductor device. If an abnormal current is detected upon receipt of an i-th functional test pattern, and an output data is different from an expected data upon receipt of a j-th functional test pattern, a fault block is determined in accordance with the i-th functional test pattern and the j-th functional test pattern.

REFERENCES:
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patent: 5449960 (1995-09-01), Ohi et al.
patent: 5467035 (1995-11-01), Ohi et al.
M. Sanada, "New Applicaton of Laser Beam to Failure Analysis of LSI with Multi-Metal Layers", Microelectron. Reliab., vol. 33, No. 7, pp. 993-1009, 1993.
M. Sanada, "Evalution and Detection of CMOS-LSI with Abnormal IDD2", Microelectron. Reliab., vol. 35, No. 3, pp. 619-629, 1995.

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