Fat conductor

Details Fat conductor Fat conductor

2003-06-28

2004-06-08

N., Chau Nguyen (Department: 2831)

Electricity: conductors and insulators

Conduits, cables or conductors

Preformed panel circuit arrangement

C174S259000, C442S348000

Reexamination Certificate

active

06747215

ABSTRACT:

A portion of the disclosure of this patent document contains material which is subject to copyright protection or to mask-work protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever.
A mask work is a kind of map or blueprint used to design and manufacture a semiconductor chip or circuits that are fabricated on like materials. The mask work defines the design of the chip in three dimensions, since a semiconductor chip consists of several layers of electronic circuits and elements that are laid down one atop another. The mask work images may be in pictorial or photographic form or broken down into digital numerical form for storage in a computer. Furthermore, the mask-work owner reserves all rights to the integrated circuit topography of mask-work examples presented hereinafter.
FIELD OF THE INVENTION
The present invention generally relates to an electrically conductive attachment. More specifically, the present invention relates to use of a thickened electrical conductor material for connection between two conductive segments located on facing surfaces.
BACKGROUND OF THE INVENTION
Numerous components are currently fabricated which methodologically require coordination between a conductive region (or segment) on a first surface and another conductive region (or segment) on a facing surface. This type of construction is typical in the fabrication of liquid crystal display (hereinafter “LCD”) panels. The LCD panels consist of two plates with an encapsulated liquid crystal film layer there between. The encapsulation is to prevent the incursion of moisture, air, or environmental contaminants. Furthermore, the plates (generally of glass, silicon, or plastic) include at least one rigid plate and at least one transparent (or substantially non-opaque) plate. Most well-know applications use two rigid plates. In order for a region of the liquid crystal material to obtain a predetermined optical property, an electric field is established above a threshold value and thereafter quickly discontinued. In order for this predetermined optical property to be cancelled, an electric field is established—generally above a lower threshold value and then gradually discontinued.
In order to apply either electric field to a selected region of the LCD (especially cholesteric liquid crystal), there are pre-positioned conductors on opposite interior faces of the plates. Furthermore, in order to electrically access these conductors, there is a conductive path from an exterior contact point to each respective conductor. By this means, selecting from pairs of exterior contacts will allow a controller to address the optical property of a selected pixel region—in the case where conductors on one face are parallel x-axis lines and conductors on the opposite face are parallel y-axis lines. Alternatively, there are icon oriented displays (rather than general purpose pixel type displays) where specific conductive patterns are established on regions of opposite faces and conductive lines are arranged respectively thereto from the plate edges in order to facilitate addressing of the icons; or more specifically their respective optical property setting.
Generally, the conductors are selected in LCDs to be transparent conductors (such as indium-tin-oxide) but very narrow visible conductive lines also are used in particular applications. These conductors are applied to the surface of the plate(s) during a fabrication process by using deposition and etching techniques for high-resolution arrangements, and with silk-screening type techniques for lower resolution applications.
There is a longstanding, well accepted axiom in the procedure for designing and fabricating LCD plate pair units, and the likes, that one needs conductive contact points on at least one exterior edge of each plate in order to address opposing pairings of conductors on opposite faces. This long accepted need results in plate pairs having at least two edge regions that do not participate in the display area per se, but only exist to provide the functionality of connective access to specific regions of the interior faces. Because there are two edge regions, there is a need in the packaging of these plate pair products for two sets of attachments; one for each edge region. Simply stated, there is a need in the art for a reduction in the number of such attachments; particularly since each independently contributes to the fabrication cost per unit. Nevertheless, it would be a significant advance in the art for the at least two edge regions to be unifies into a lesser number of contiguous regions; and presumably optimally into one contiguous region.
One might expect that electrical interconnections between facing surfaces to be a standard method for overcoming this apparent topological over engineering, but no such fabrications technique has been forthcoming.
One might consider p-type or n-type materials that are selectively deposited (using optical-mask transfer techniques) on semiconductor substrates functionally as examples of inter-layer electrical connectivity. However, layering of these types of materials is explicitly for implementing active electrical elements, such as memory, gates, logic circuits, counters, etc.; or on a more refined level of analysis, for partial capacitance, partial resistance, etc. and not for simple electrical connectivity across facing surfaces. Actually, the deposition and etching techniques implements in mask work products incorporating p-type or n-type materials are specifically characterized by building up circuit functionally onto a single surface; and not building up two circuit halves for eventual aligned interface and electrically circuit interconnectivity. Fabricating three-dimensional circuits in this way would suffer from certain lower precision available in mechanical alignment between the plate surface faces than in the deposition and etching. Hence, one would never consider a hybrid process of building up semiconductor layers simultaneously with even a single mechanically aligned pairing between two of those layers.
Alternatively, one might consider solder points on printed circuit boards (hereinafter “PCB”) as perhaps contributing to some reduced topological complexity for multiple PCB layers. However these configurations are integrated by design with a plurality of pre-drilled component attachment holes; and are not present for actually implementing simple electrical contact between otherwise facing PCB layer surfaces—nor can one easily find a reason for what such a sandwich construction would be trying to accomplish.
Collectively, it appears that in the world of layered electrical components having interstitial dielectric thin film interfacing (such as LCDs) there has been no novel implementations of simple electrical topological simplifications using inter layer electrical connections. While U.S. Pat. No. 5,283,948 U.S. Pat. No. 6,063,647 and U.S. Pat. No. 6,239,384 each describe a form of perpendicular connector that might be useful for implementing basic topological simplifications in such systems, no evidence of such application has been forthcoming. Thus, it is surprising that in the super competitive high tech CAD/CAM type electronic component fabrication environment of LCDs there has been no progressive solution for reducing the electrical connective architecture; which is one of the most expensive per unit aspects of these components; after the overall fabrication setup costs have been amortized.
BRIEF SUMMARY OF THE INVENTION
The present invention relates to a fat conductor. The fat conductor of the present invention is especially useful for electrically interconnecting between a pair of substantially parallel plates, wherein each of the plates has a prearranged pattern of conducting surface coating regions on the interior face side thereof. The fat conductor is specifically for use in sandwi

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