Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2007-07-03
2007-07-03
Ngo, Chuong D. (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
10613095
ABSTRACT:
Circuitry for reducing propagation delays in calculation of a value for use in a floating point multiply-accumulate operation. In the circuitry, a carry-save adder receives values of three input operands from three latches. A carry-lookahead adder receives the outputs from the carry-save adder and implements an XOR operation on a most-significant bit along with its own logic operation to produce a value for the floating point multiply-accumulate operation. Modification of the carry-lookahead adder to perform the XOR operation results in elimination of an entire stage of logic.
REFERENCES:
patent: 5636157 (1997-06-01), Hesson et al.
patent: 5719803 (1998-02-01), Naffziger
patent: 5790444 (1998-08-01), Olson et al.
Kumar Sanjay
Thayer Paul R.
Hewlett--Packard Development Company, L.P.
Ngo Chuong D.
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