Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-02-06
2007-02-06
Auduong, Gene N. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185030, C365S185190
Reexamination Certificate
active
11099259
ABSTRACT:
A program voltage signal implemented as a series of increasing program voltage pulses is applied to a set of non-volatile storage elements. Different increment values can be used when programming memory cells to different memory states. A smaller increment value can be used when programming memory cells to lower threshold voltage memory states and a larger increment value used when programming memory cells to higher threshold voltage memory states such as the highest memory state in an implementation. When non-volatile storage elements of a set are programmed to different memory states under simultaneous application of a single program voltage signal, programming can be monitored to determine when lower state programming is complete. The increment value can then be increased to complete programming to the highest memory state. Coarse/fine programming methodology can be incorporated for the highest memory state when the increment value is increased to maintain the threshold distribution within a reasonable range.
REFERENCES:
patent: 5220531 (1993-06-01), Blyth et al.
patent: 5313421 (1994-05-01), Guterman et al.
patent: 5386422 (1995-01-01), Endoh et al.
patent: 5412601 (1995-05-01), Sawada et al.
patent: 5521865 (1996-05-01), Ohuchi et al.
patent: 5570315 (1996-10-01), Tanaka et al.
patent: 5652719 (1997-07-01), Tanaka et al.
patent: 5712180 (1998-01-01), Guterman et al.
patent: 5712815 (1998-01-01), Bill et al.
patent: 5761222 (1998-06-01), Baldi
patent: 5870344 (1999-02-01), Ozawa
patent: 5926409 (1999-07-01), Engh et al.
patent: 5949714 (1999-09-01), Hemink et al.
patent: 5969986 (1999-10-01), Wong et al.
patent: 6151248 (2000-11-01), Harari et al.
patent: 6222762 (2001-04-01), Guterman et al.
patent: 6226270 (2001-05-01), Chiku et al.
patent: 6243290 (2001-06-01), Kurata et al.
patent: 6278632 (2001-08-01), Chevallier
patent: 6301161 (2001-10-01), Holzmann et al.
patent: 6317364 (2001-11-01), Guterman et al.
patent: 6343033 (2002-01-01), Parker et al.
patent: 6373748 (2002-04-01), Ikehashi et al.
patent: 6424566 (2002-07-01), Parker
patent: 6490201 (2002-12-01), Sakamoto
patent: 6496410 (2002-12-01), Parker
patent: 6496418 (2002-12-01), Kawahara et al.
patent: 6519184 (2003-02-01), Tanaka et al.
patent: 6522580 (2003-02-01), Chen et al.
patent: 6525964 (2003-02-01), Tanaka et al.
patent: 6529412 (2003-03-01), Chen et al.
patent: 6532172 (2003-03-01), Harari et al.
patent: 6535428 (2003-03-01), Pasotti et al.
patent: 6590811 (2003-07-01), Hamilton et al.
patent: 6643188 (2003-11-01), Tanaka et al.
patent: 6657891 (2003-12-01), Shibata et al.
patent: 6714457 (2004-03-01), Hsu et al.
patent: 6738289 (2004-05-01), Gongwer
patent: 6809962 (2004-10-01), Uribe et al.
patent: 6891757 (2005-05-01), Hosono et al.
patent: 6937520 (2005-08-01), Ono et al.
patent: 6958934 (2005-10-01), Fan et al.
patent: 2002/0118574 (2002-08-01), Gongwer et al.
patent: 0877386 (1998-11-01), None
patent: 1249842 (2002-10-01), None
patent: 1426968 (2004-06-01), None
patent: WO 98/28745 (1998-07-01), None
Kurata, Hideaki, et al., Constant-Charge-Injection Programming for 10-MB/s Multilevel AG-AND Flash Memories. 2002 Symposium On VLSI Circuits Digest of Technical Papers, pp. 302-303.
Johnson, William S., et al., Session XII: ROMs, PROMs and EROMs, 1980 IEEE International Solid State Circuits Conference, pp. 152-153.
Nobukata, Hiromi, et al., A 144Mb 8-Level NAND Flash Memory with Optimized Pulse Width Programming, 1999 Symposium on VLSI Circuits Digest of Technical Papers, pp. 39-40.
Ohkawa, Masayoshi, et al., TP 2.3: A 98 mm2 3.3V 64Mb Flash Memory with FN-NOR Type 4-level Cell, 1996 IEEE International Solid-State Circuits Conference, pp. 36-37.
Auduong Gene N.
Sandisk Corporation
Vierra Magen Marcus & DeNiro LLP
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