Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Electrical signal parameter measurement system
Reexamination Certificate
2002-06-21
2004-06-15
Shah, Kamini (Department: 2863)
Data processing: measuring, calibrating, or testing
Measurement system in a specific environment
Electrical signal parameter measurement system
C702S066000, C702S070000, C702S071000, C345S441000, C345S667000, C345S668000, C345S669000, C345S670000, C345S671000
Reexamination Certificate
active
06751565
ABSTRACT:
BACKGROUND OF INVENTION
1. Field of the Invention
The present invention relates to a display method and system. More specifically, a method is disclosed providing for the rapid display of waveform data in a circuit simulation system.
2. Description of the Prior Art
More and more, designers of complex electronics are turning to circuit simulation systems to design, test and debug the circuits they are creating. Using simulators over the physical circuits themselves provides for greater rapidity and flexibility in design changes, and for significant savings in both cost and time during the design cycle.
To “layout” their circuits, hardware designers turn to a specialized software, termed hardware development language (HDL), such as Verilog or VHDL, to code the circuit design into a machine-readable format that can be executed by a simulator to generate simulation data. This HDL code may also be parsed to graphically present on a display system the actual circuit layout.
When debugging, circuit designers look through the circuit simulation data generated by the simulator, and compare simulated line signals against desired results. Signals that are not behaving as desired indicate bugs in the HDL code, and hence in the circuit design. Such simulation data is generally presented by a computer on a display. Please refer to FIG.
1
.
FIG. 1
illustrates simulated waveform results
18
a
being presented on a monitor
18
by an HDL design system
10
. The HDL design system
10
is a computer system, typically a personal computer (PC), though minicomputers and mainframes are also frequently used. The exact computational platform is relatively unimportant, the difference being one merely of computational power, and hence speed. The computer system
10
will typically include an editor
12
that enables a user to modify HDL source code
12
a
, and a simulator
14
which uses the HDL source code
12
a
to generate simulation data
14
a
, essentially “running” the circuit coded by the HDL source code
12
a
for a specific “time” and storing the results as simulation data
14
a
. The simulation data
14
a
typically holds the state of all circuit elements throughout the simulated run time. A display system
16
is then used to present the simulation data
14
a
to the user on a monitor
18
, as well as using the HDL source code
12
a
to present a graphical illustration of the circuit. As shown on the monitor
18
, the circuit simulation data
14
a
is typically presented in the form of waveforms
18
a
, each waveform
18
a
showing the evolution of a state of a circuit element over time. The state of a circuit element is a signal, circuit elements influencing each other by exchanging signals by way of conductive lines, and accepting signals from an outside source. Hence, the simulation data
14
a
is simply a vast array of signals and how these signals change with time. User I/O devices
10
a
permit the user to control the HDL design system
10
.
When debugging a circuit, it is frequently necessary to look at various sections, in terms of time, of the simulation data
14
a
. The display system
16
thus permits the user to scroll, zoom in and zoom out the waveforms
18
a
. Consider, for example,
FIGS. 2
a
through
2
c
, with reference to FIG.
1
.
FIGS. 2
a
through
2
c
illustrate zooming out on a waveform for a signal sf. Signal sf may, for example, represent the output state of an AND gate, or be one of several input lines into a multiplexer. In any event, within
FIG. 2A
, the display system
16
presents a waveform
20
a
for the signal sf over a certain span of simulated time, the range of time indicated by a timeline
21
a
. Simulated time increases from left to right on the display
18
, while changes to the signal sf are indicated by corresponding vertical changes in the waveform
20
a
. A user instructs the display system
16
to zoom out on the waveform
20
a
, and the result of this action is presented in
FIG. 2B
as a waveform
20
b
, and a corresponding timeline
21
b
. In
FIG. 2B
, dotted lines indicate the portion of the waveform
20
a
visible in FIG.
2
A. After zooming out, a greater extent (in terms of simulated time) of the signal sf is present on the display
18
in the form of waveform
20
b
. However, a greater amount of time must be squeezed into the same horizontal width of the display
18
, and waveform
20
b
is thus correspondingly diminished along the horizontal axis of the display
18
. Generally, when displaying a signal, zooming in or zooming out of the corresponding waveform will leave the scaling of the vertical axis unchanged. Another zoom out procedure is performed on waveform
20
b
, resulting in a new waveform
20
c
presented on the display
18
, as shown in
FIG. 2C
, and a new timeline
21
c
. Dotted lines in
FIG. 2C
illustrate the extent of the signal sf present as waveform
20
b
in FIG.
2
B. Again, a greater amount of time is presented along the same horizontal width of the display
18
, so that transitions in the waveform
20
c
are closer together than the same transitions in waveforms
20
a
and
20
b.
The display
18
has a fixed resolution and eventually, as the user continues to zoom out, transitions in the waveform will begin to exceed the resolution of the display
18
. Please refer to
FIG. 3
for an example of this.
FIG. 3
is a detailed view of the display
18
when attempting to display a highly compressed waveform
23
. As is well known in the art of display technologies, the display
18
is typically composed of a plurality of pixels
18
p
, all of which have a uniform width and height. It is convenient to think of the pixels
18
p
as squares, though this is not necessarily the case. Nevertheless, the pixels
18
p
all have a width
18
w
, and thus, in terms of the waveform
23
, span a region of simulated time. To draw the waveform
23
, the display system
16
determines which pixels
18
p
lie in the path of the waveform
23
, and then colors these pixels
18
p
accordingly. For example, all pixels
18
p
may be initially colored black. When the waveform
23
is computed and drawn, all pixels
18
p
in the path of the waveform
23
are colored white. A white waveform
23
should thus appear on the display
18
against a black background. However, the transition frequency of the waveform
23
exceeds the width
18
w
of the pixels
18
p
. Hence, all pixels
18
p
within a block
18
b
will be colored white. In effect, the user is not presented the waveform
23
, but rather a solidly filled rectangle of white. Worse still, though, is that generating this solid rectangle
18
b
is relatively slow. The waveform
23
is clearly made up of a plurality of horizontal line segments
23
h
and vertical line segments
23
v
, each having a start-point and an end-point. To draw the waveform
23
, the display system
16
repetitively feeds the start and end point pairs to a line drawing algorithm
16
L. Such line drawing algorithms
16
L are well known in the art of computer display technology, and simply draw a line on the display
18
that connects the start point pixel
18
p
to the end point pixel
18
p
, coloring all such intermediate pixels
18
p
to a desired color, such as white. The line drawing algorithm
16
L may be implemented in either hardware or software. When drawing the waveform
23
, unnecessary calls are made to the line drawing algorithm
16
L to draw pixels
18
p
that have already been colored by a previous transition of the waveform
23
. For example, in a column
23
c
of pixels
18
p
within the block
18
b
, as many as seven calls to the line drawing algorithm
16
L are made to color the same column
23
c
of pixels
18
p
, due to the seven vertical lines
23
v
of the waveform
23
that lie within the column
23
c
. This significantly slows the display speeds of the HDL design system
10
when presenting the waveform
23
.
SUMMARY OF INVENTION
It is therefore a primary objective of this invention to provide a method and associated system that permits the rapid displaying of waveform data.
Briefly summa
Chen Chung-Chia
Lai Fei-Pei
Naroska Edwin Kurt
Dougherty Anthony T.
Hsu Winston
Shah Kamini
Springsoft, Inc.
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