Patent
1988-06-03
1990-08-21
Mintel, William
357 59, 357 45, 357 67, 357 2314, H01L 2978
Patent
active
049511033
ABSTRACT:
A non-volatie cross-point memory cell array comprises a trench isolated cross-point array of memory cells (10), which are electrically programmable and electrically FLASH eraseable, having diffused regions (28) operable as bitlines, each diffused region (28) traversed by a plurality of control gates (54) operable as wordlines. The diffused regions (28) undergo a silicidation process to decrease their resistivity, and thereby increase the speed of the memory cell array. A tunnel oxide (18) is provided for electrical erasing and programming. Planarized, high quality insulating regions (40, 36), such as dichlorosilane oxide, buttress the floating gate (20) to isolate the bitlines form the wordlines and to improve isolation between the pass gate and the floating gate. A planar structure of the memory cell (10) provides flat topography ideal for three dimensional stacked structures. Trench isolation regions (56) reduce bitline capacitance, thereby increasing programming speed.
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Esquivel Agerico L.
Mitchell Allan T.
Comfort James T.
Mintel William
Sharp Melvin
Sorensen Douglas A.
Texas Instruments Incorporated
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