Fast trailing BIMOS logic gate

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307570, H03K 1901

Patent

active

050346288

ABSTRACT:
The invention relates to a BIMOS logic gate comprising: a bipolar transistor; and depletion type MOS transistors whose sources are connected to a base of the bipolar transistor or MOS transistors having a threshold voltage smaller than that of MOS transistors constructing another complementary type logic circuit. A current of the bipolar transistor flows at an input voltage lower than that of the related art BIMOS logic gate and the current can be cut off by an input voltage which is equal to that of the ordinary complementary type logic circuit. Thus, the gate operates at a low electric power and can operate at a high speed at a low power source voltage.

REFERENCES:
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patent: 4682054 (1987-07-01), McLaughlin
patent: 4694203 (1987-09-01), Uragami et al.
patent: 4740718 (1988-04-01), Matsui
patent: 4804869 (1989-02-01), Masuda et al.
patent: 4816705 (1989-03-01), Ohba et al.
patent: 4871928 (1989-10-01), Bushey
patent: 4880998 (1989-11-01), Ueda
patent: 4948994 (1990-08-01), Akioka et al.
"0.5 Micron BIMOS Technology", H. Momose et al., Hewlett-Packard Company, Palo Alto, Calif.

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