Fast synchronization circuit for phase locked looped decoder

Details Fast synchronization circuit for phase locked looped decoder Fast synchronization circuit for phase locked looped decoder

1978-09-26

1980-07-29

Safourek, Benedict V.

Pulse or digital communications

Spread spectrum

Direct sequence

375120, 360 51, H04L 704, H03D 324

Patent

active

042154308

ABSTRACT:
A phase detector in a phase locked loop decoder includes a reactive circuit adapted to vary a clock frequency responsive to a signal representing the phase error between a clocking signal and an incoming data signal, to maintain synchronization of the clocking and data signals. A fast synchronization circuit of the phase detector is adapted to generate a clock-frequency-altering signal whenever selected inputs derived from the data and clocking signals occur simultaneously, thereby rapidly forcing the clocking signal toward synchronization with the data signal.

REFERENCES:
patent: 3337747 (1967-04-01), Krasnick et al.
patent: 3593044 (1971-07-01), McNeilly
patent: 3731220 (1973-05-01), Besenfelder
patent: 3755747 (1973-08-01), Letosky
patent: 3939438 (1976-02-01), Taylor
patent: 3944940 (1976-03-01), Desai
patent: 4055814 (1977-10-01), Abraham et al.
patent: 4085288 (1978-04-01), Viswanatham
patent: 4155045 (1979-05-01), Forsberg

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