Oscillators – Frequency stabilization
Reexamination Certificate
2002-12-16
2004-10-12
Kinkead, Arnold (Department: 2817)
Oscillators
Frequency stabilization
C331S185000, C331S186000, C331S074000, C331S135000, C327S142000, C327S143000
Reexamination Certificate
active
06803833
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a fast start-up oscillator, and particularly to an oscillator quickly stabilized by a voltage control procedure.
2. Description of the Related Art
Digital circuits require a start-up clock to wake up the system.
FIG. 1
shows a diagram of waveform in conventional oscillators. During power up process, power supply VCC does not rise to an acceptable level, thus the oscillating frequency of oscillators does not meet requirements. Conventional oscillators need to count 4000-5000 clocks to ensure that clock frequency is correct and KOUT output a correct clock. This approach, however, takes a long time to stabilize oscillators.
There is a need for a fast startup RC-oscillator to wake up digital circuits.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a fast startup RC-oscillator.
To achieve the above objects, the present invention provides a fast startup RC-oscillator with a strong startup bandgap reference to regulate a voltage source consumed by the RC-oscillator.
The fast startup oscillator includes a power-on-reset detect circuit, a bandgap circuit, a RC-oscillator, a voltage detect circuit, and a count two circuit. The bandgap circuit has a strong startup circuit.
The power-on-reset detect circuit is utilized to detect a power supply reaching a acceptable level thereby sending a start signal. When receiving the start signal, the strong startup circuit of the bandgap circuit drives a large current to force the bandgap circuit to be biased properly in a short time and output a bandgap reference voltage.
The RC-oscillator has a regulated voltage source referencing the bandgap reference voltage and generating a clock signal. Frequency of the clock signal is determined by regulated voltages and current source. The regulated voltages are determined by the bandgap reference voltage. The current source is generated according to the bandgap reference voltage.
When detecting whether the regulated voltage source has reached a required level, the voltage detect circuit sends an output enable signal to the count two circuit. When receiving the output enable signal, the count two circuit starts to count two clocks and then outputs the clock signal.
REFERENCES:
patent: 6728891 (2004-04-01), Hanjani
Lin Yu-Tong
Yen Wen-Cheng
Faraday Technology Corp.
Kinkead Arnold
Rabin & Berdo P.C.
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