Fast scan image registration method and apparatus for high...

Facsimile and static presentation processing – Static presentation processing – Flying dot

Reexamination Certificate

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C358S001180, C358S001500, C358S001120, C382S151000

Reexamination Certificate

active

06778293

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to the art of digital image printing. It finds particular application in conjunction with registering or aligning picture elements precisely in a raster output scanner printers and will be described with reference thereto. It is to be appreciated, however, that the invention may find further application in any other raster output scanning device including, but not limited to copiers, facsimile machines and the like.
Printers are known in the art wherein a raster output scanner (ROS) is positioned in an optical scan system to write an image on the surface of a moving photoreceptor belt. A modulated laser beam is swept across the photoreceptor surface after being directed against the facets of a rotating polygon. Each sweep exposes a raster line to a linear segment of a video signal image.
In color xerographic ROS printers, a plurality of ROS units are positioned adjacent to a photoreceptor belt surface or the like and selectively energized to create successive image exposures. High addressable ROS printers output a series of closely spaced binary dots (i.e. either on or off) which the human eye integrates into shades of color. The printer creates a component image exposure for each color component of the desired output image. For full color, four imagers are used, one for each of the three basic colors and a fourth for black images. Each image is placed in overlying registration with the other images and a composite color image is transferred to an output sheet. In high addressable printers these overlapping images are composed of the spaced binary dots nominally spaced 5 microns apart. Thus, each image must be precisely registered in both the photoreceptor process direction (also referred to as the ‘slow scan’ direction) and in the direction perpendicular to the process direction (referred to as the ‘fast scan’ direction). Misalignment or improper registration causes improper color matching and other image degradations.
Unfortunately, mechanical components (e.g. multiple rotating polygons, and the moving receptor belt) of such systems often induce registration errors including:
Start of scan to video clock asynchronous jitter;
Polygon facet jitter;
Photoreceptor motion errors; and
Paper to photoreceptor registration errors.
Few techniques are known for improving image registration. Typically these techniques receive registration errors from other subsystems, and make a correction based on the errors provided. One method involves mechanically “steering” the photoreceptor belt. The registration system disclosed in U.S. Pat. No. 5,737,003 includes a belt steering control system that steers the photoconductor belt based on errors detected from an upstream position to reduce continued deviation of the belt. The registration system also may include a scan control system that, based on the detected position, controls the modulation of laser beams scanned to form latent images on the photoconductor belt. However, in addition to being mechanically complex, and such methods are unable to correct for upstream or previous registration errors.
Another method disclosed in U.S. Pat. No. 5,278,587 registers the image by controlling a video enable signal. The error signal in this system is an electrical current representative of the error. The electrical current is extrapolated to determine a midpoint for an illumination profile crossing the scan line and, from this, a reference time is calculated at which the midpoint of the beam illumination was reached. This reference time is then used to generate a timed line sync signal which registers the first scan line of each image sequence. However, this method only registers the first scan line and thus image quality may deteriorate as the image proceeds in the slow scan direction.
The present invention contemplates a new, efficient error correction apparatus and method of use which overcomes the above referenced problems and others.
BRIEF SUMMARY OF THE INVENTION
In accordance with the present invention, there is provided a method for correcting a fast scan registration error in a raster output scanner printing system receiving a video input byte and outputting a high addressable video bit stream. The method includes determining a delay factor corresponding to the fast scan registration error and then, delaying receipt of the video input byte for a delay factor. After the delaying, the video input is received and converted into the high addressable video bit stream. Effectively the bit stream is delayed by the first portion of the delay factor, thus correcting the registration error.
In accordance with another aspect of the present invention, the method further includes separating an integer component from the delay factor and delaying requesting the video input byte from a buffer for the integer component of the delay factor.
In accordance with another aspect of the present invention, the determining a delay factor includes summing errors including a predefined system error and a dynamically calculated run-time error.
In accordance with another aspect of the present invention, the determining a delay factor further includes adding a desired delay for a fast scan image shift to the delay factor.
In accordance with another aspect of the present invention, the method further includes synchronizing the video input byte with a first clock cycle, and synchronizing the high addressable video bit stream with a second clock cycle.
In accordance with another aspect of the present invention, the delaying output of the video bit stream step includes sequentially delaying each output bit for a number of second clock cycles proportional to the fractional portion of the delay factor.
In accordance with another aspect of the present invention, the delay factor is applied in run time as the raster output scanner scans successive rasters.
In another aspect of the present invention, a method is provided for registering a plurality of component images in a raster output scanner device by delaying output of a high addressable bit stream in a fast scan direction. At a scan line start, the method includes, determining a delay factor comprising an integer delay component corresponding to a number of whole pixels, and a fractional delay component corresponding to a number of partial pixels. A video input byte, delayed from the scan line start by the integer delay component, is received, thereby registering the high addressable bit stream after the scan line start to within a whole pixel. The video input byte is converted into the high addressable bit stream, and output further delayed from the scan line start by the fractional delay component.
In accordance with another aspect of the present invention, the determining the delay factor step includes summing: (1) a predefined device error value, (2) a dynamically calculated error value; and (3) an operator provided shift value.
In another aspect of the present invention, a video output system receives a video input byte, corrects at least one fast scan registration error and outputs a high addressable bit stream. The system includes a raster output scanner providing a start of scan signal indicative of starting a fast scan line. An adder is provided to calculate a sum of a set of fast scan registration errors upon receipt of the start of scan signal. A line sync generator signals a buffer to input the video input byte into the system, after delaying for a number of first clock cycles from the start of scan signal. The high addressable bit stream output is thus moved along the fast scan line, correcting the set of fast scan registration errors.
In accordance with another aspect of the present invention, the system also includes a parallel to serial shift register for converting the video input byte to the high addressable output bit stream. A delay register receives the bit stream from the shift register and delays outputting the high addressable bit stream by a fractional portion of the sum from the adder by at least a portion of a pixel corresponding to the fractio

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