Fast sample and hold circuit configuration

Details Fast sample and hold circuit configuration Fast sample and hold circuit configuration

1990-04-24

1991-08-13

Zazworsky, John

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307494, G11C 2702

Patent

active

050398806

ABSTRACT:
A sample and hold circuit configuration for differential signals with reduced holding capacity includes an amplifier in which the same current ratios prevail in the collector circuit and in the emitter circuit. The base currents are discharged through additional transistors and therefore the same currents flow and equal voltage ratios prevail in the collector and emitter resistors, and an additional diode is connected in each collector circuit.

REFERENCES:
patent: 3452289 (1969-06-01), Ryan
patent: 3474259 (1969-10-01), Rodgers
patent: 3643110 (1972-02-01), Thompson
patent: 4370572 (1983-01-01), Cosand et al.
patent: 4873457 (1989-10-01), Sanielevici
IEEE Journal of Solid-State Circuits, Feb. 1970, pp. 45-48, Ryan: "Applications of a Four-Quadrant Multiplier".

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