Fast sample and hold circuit configuration

Details Fast sample and hold circuit configuration Fast sample and hold circuit configuration

1990-04-24

1991-09-10

Zazworsky, John

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307264, 307491, 307494, G11C 2702

Patent

active

050476661

ABSTRACT:
A circuit configuration includes a symmetrically constructed sample and hold amplifier. A first switchable level shifter has an input in the form of a first signal input terminal for receiving a given signal, and an output being connected to the sample and hold amplifier for supplying a differential output signal. A second switchable level shifter has an input in the form of a second signal input terminal for receiving a signal complementary to the given signal, and an output being connected to the sample and hold amplifier for supplying a differential output signal. The input and output signals of each of the switchable level shifters having a different constant direct voltage difference as a function of the switching state of the level shifters.

REFERENCES:
patent: 3452289 (1969-06-01), Ryan
patent: 4302689 (1981-11-01), Brodie
patent: 4370572 (1983-01-01), Cosand et al.
patent: 4634993 (1987-01-01), Koen
patent: 4873457 (1989-10-01), Sanielevici
IEEE Journal of Solid.varies.State Circuits, Feb. 1970, pp. 45-48; C. R. Ryan: "Applications of a Four-Quadrant Multiplier".

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