Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2000-04-06
2002-03-05
Young, Brian (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
Reexamination Certificate
active
06353403
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method and apparatus for quickly ramping up a control voltage supplied to a voltage controlled device, such as voltage controlled crystal oscillator.
For wireless communications mobile terminals, such as cellular telephones, minimizing power usage so as to conserve battery power is a major design consideration. One typical consumer of battery power in such devices is the device's frequency synthesizer, which typically includes a crystal oscillator. The crystal oscillator generates a controlled reference frequency that is used to generate the desired mixing and other frequencies used for various wireless communications tasks. As known in the art, this crystal oscillator typically takes the form of a voltage controlled crystal oscillator. However, most mobile terminals typically communicate on a time division multiplex basis, meaning that there are significant periods of idleness when the crystal oscillator is not needed. For instance, a mobile terminal may be in what is known as an idle state when the mobile terminal is camped on a control channel, but otherwise not engaged in a call. In such situations, the mobile terminal may only need the crystal oscillator to check paging messages, which may, for example, occur once every 1.28 seconds. Thus, in order to conserve battery power, it may be prudent to turn off the crystal oscillator of a wireless communications mobile terminal when the crystal oscillator is not needed for communications or other tasks. Obviously, when the crystal oscillator is turned back on, it is desirable to bring the crystal oscillator to the proper frequency as quickly as possible so as to reduce the amount of time the crystal oscillator has to be powered on.
In most mobile terminals, a 10-bit digital to analog converter (DAC) is used to tune the crystal oscillator to the proper frequency. The 10-bit DAC is typically connected to the crystal oscillator via a filter network for filtering the control output from the DAC. Typically, the filtering network provides a long time constant for smoothing frequency corrections. One drawback of a filter network with long time constant is that the filtered control output settles very slowly. Thus, the control voltage seen by the crystal oscillator is slow to ramp up and the crystal oscillator is therefore slow to achieve the proper frequency. Thus, the crystal oscillator must be “turned on” sooner so that it may be at the proper frequency when needed.
Thus, there remains a need for a method and apparatus for generating a control voltage that generally retains the advantage of a long time constant but that also allows for quick ramp up.
SUMMARY OF THE INVENTION
A logic circuit for generating a control voltage according to a first aspect of the present invention includes two DACs, frequently referred to herein as the ramp DAC and the main DAC. When the control voltage is needed, such as when the crystal oscillator is being “turned on,” an input reference voltage is supplied to at least the ramp DAC, and preferably to both the ramp DAC and the main DAC. The ramp DAC generates an output based on the input reference voltage and L supplied control bits for a first (preferably short) time period. In most embodiments, this output from the ramp DAC is fed to a filter circuit that includes a capacitor. The output from the ramp DAC charges the capacitor and the control voltage is generated at least in part from the ramp DAC output as filtered by the capacitor. When the first time period ends, the state of the input reference voltage is changed and the output from the main DAC, based on the changed input reference voltage and N control bits, is input to the filter. Thus, after the first time period expires, the control voltage is preferably based on the output from the main DAC.
One purpose of the ramp DAC is to supply an output that causes a more accelerated charging of the capacitor in the filter as compared with the output of the main DAC. Such a two DAC arrangement allows for a shorter time constant circuit to be employed in association with the ramp DAC and a longer time constant circuit to be employed in association with the main DAC, allowing for quick ramp up of the control voltage.
For the present invention, the number of control bits for the ramp DAC (L) is less than the number of control bits for the main DAC (N). However, as noted, the state of the input reference voltage is changed when the first time period (e.g., the ramp period) expires. This approach is taken so that the output of the ramp DAC may be more closely matched to the output of the main DAC. By adjusting the input reference voltage when supplied to the ramp DAC during the ramp period, as compared with when supplied to the main DAC after the ramp period, the circuit allows emulation of greater than L-bit control for the ramp DAC. Thus, the output of the ramp DAC may be more closely “tuned” to the output of the main DAC without increasing the number of control bits supplied to the ramp DAC.
REFERENCES:
patent: 4094480 (1978-06-01), Nixon
patent: 5355098 (1994-10-01), Iwasaki
patent: 5621485 (1997-04-01), Terao et al.
patent: 6121811 (2000-09-01), Scott
patent: 6232759 (2001-05-01), Wohlfarth
patent: 2317279 (1998-03-01), None
patent: 0579978 (1994-01-01), None
Coats & Bennett P.L.L.C.
Ericsson Inc.
Young Brian
LandOfFree
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