Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-05-16
2006-05-16
Zarabian, Amir (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185220, C365S185230, C365S185280
Reexamination Certificate
active
07046553
ABSTRACT:
In the present invention a new method for program and program verify is described. The threshold voltage of the memory cell is shifted up and then measured with minimal charging and discharging of the bit lines and control gate lines. Bit line to control gate line capacitance is also used to reduce the number of voltage references needed. Program current is reduced by use of a load device coupled to the source diffusion. The result is increased program bandwidth with lower high voltage charge pump current consumption.
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“Twin MONOS Cell with Dual Control Gates”, by Yutaka Hayashi et al., 2000 Symposium on VLSI Technology Digest of Technical Papers, pp. 122-123.
Ogura Nori
Ogura Seiki
Ogura Tomoko
Ackerman Stephen B.
Halo LSI, Inc.
Pham Ly Duy
Saile George D.
Zarabian Amir
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