Fast parallel cascaded array modular multiplier

Details Fast parallel cascaded array modular multiplier Fast parallel cascaded array modular multiplier

2005-05-10

2005-05-10

Malzahn, D. H. (Department: 2124)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

06892215

ABSTRACT:
A fast, parallel modular multiplier is presented which is scalable according to available hardware resources. Linear throughput increases with respect to consumed resources is achieved. Multiple independent data streams may be processed simultaneously, and optimal clock rates are attained by virtue of limited fan-out of all signal paths and nearest neighbor interconnections. Integrated circuit implementation is benefited by the potential for signal sharing among input and output busses and a common control interface for all independent data streams.

REFERENCES:
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patent: 6763365 (2004-07-01), Chen et al.
patent: 6804696 (2004-10-01), Chen et al.
patent: 20040010530 (2004-01-01), Freking et al.

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