Fast n-bit by n-bit multipliers using 4-bit by 4-bit multipliers

Details Fast n-bit by n-bit multipliers using 4-bit by 4-bit multipliers Fast n-bit by n-bit multipliers using 4-bit by 4-bit multipliers

1996-09-12

1999-06-15

Malzahn, David H.

Boots, shoes, and leggings

G06F 750

Patent

active

059128321

ABSTRACT:
A method and apparatus for n-bit by n-bit multiplication is disclosed using paralleled 4-bit by 4-bit multipliers and cascaded adder structures. The cascaded adder structures may be used to produce non-pipelined, integer, n-bit by n-bit multipliers with higher throughput than systolic array multipliers of similar geometries.

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