Boots – shoes – and leggings
Patent
1994-07-20
1996-05-14
Malzahn, David H.
Boots, shoes, and leggings
364736, G06F 738
Patent
active
055174388
ABSTRACT:
A pipeline floating point processor in which the addition pipelining is reorganized so that no wait cycle is needed when the addition uses the result of an immediately foregoing multiplication (fast multiply-add instruction). The reorganization implies the following changes of an existing data flow of the pipeline floating processor: data feed-back via path ND of normalized data from the multiplier M into the aligners AL1 and AL2; shift left one digit feature on both sides of the data path for taking account of a possible leading zero digit of the product, and special zeroing of potential guard digits by Z1 and Z2; exponent build by 9 bits for overflow and underflow recognition, and due to an underflow the exponent result, is reset to zero on the fly by a true zero unit (T/C).
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S et al. "A Single-Chip IBM System/390 Floating-Point Processor In CMOS", p. 734, column 1, line 21-line 43; FIG. 1.
Dao-Trong Son
Haas Juergen
Mueller Rolf
Goldman Richard M.
International Business Machines - Corporation
Malzahn David H.
Shkurko Eugene I.
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